学び直し13日目：3章 順序回路④

記録

• RAM8, RAM64 を書いた。入力を load、sel を address とした Dmux で load 先を選んであげたらよい。入力は全部のレジスタにつなげておく。
• 下位のメモリができれば、あとは再帰的に組んでいけばよい。Ram64 の場合、address が xxxyyy なら、xxx で Ram8 を指定して、yyy で Ram8 の中のレジスタを指定している。Ram512 ならアドレスは xxxyyyzzz になるし、Ram4K なら xxxyyyzzzwww になるはず。
• PC（プログラムカウンタ）が分かりそうでわからない。もうちょい考えてみる。

RAM8

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM8.hdl

/**
 * Memory of 8 registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM8 {
    IN in[16], load, address[3];
    OUT out[16];

    PARTS:
    // Put your code here:
    DMux8Way(in=load, sel=address, a=load0, b=load1, c=load2, d=load3, e=load4, f=load5, g=load6, h=load7);
    Register(in=in, load=load0, out=w0);
    Register(in=in, load=load1, out=w1);
    Register(in=in, load=load2, out=w2);
    Register(in=in, load=load3, out=w3);
    Register(in=in, load=load4, out=w4);
    Register(in=in, load=load5, out=w5);
    Register(in=in, load=load6, out=w6);
    Register(in=in, load=load7, out=w7);
    Mux8Way16(a=w0, b=w1, c=w2, d=w3, e=w4, f=w5, g=w6, h=w7, sel=address, out=out);
}

RAM64

// This file is part of www.nand2tetris.org
// and the book "The Elements of Computing Systems"
// by Nisan and Schocken, MIT Press.
// File name: projects/03/a/RAM64.hdl

/**
 * Memory of 64 registers, each 16 bit-wide. Out holds the value
 * stored at the memory location specified by address. If load==1, then 
 * the in value is loaded into the memory location specified by address 
 * (the loaded value will be emitted to out from the next time step onward).
 */

CHIP RAM64 {
    IN in[16], load, address[6];
    OUT out[16];

    PARTS:
    // Put your code here:
    DMux8Way(in=load, sel=address[3..5], a=w0, b=w1, c=w2, d=w3, e=w4, f=w5, g=w6, h=w7);
    RAM8(in=in, load=w0, address=address[0..2], out=o0);
    RAM8(in=in, load=w1, address=address[0..2], out=o1);
    RAM8(in=in, load=w2, address=address[0..2], out=o2);
    RAM8(in=in, load=w3, address=address[0..2], out=o3);
    RAM8(in=in, load=w4, address=address[0..2], out=o4);
    RAM8(in=in, load=w5, address=address[0..2], out=o5);
    RAM8(in=in, load=w6, address=address[0..2], out=o6);
    RAM8(in=in, load=w7, address=address[0..2], out=o7);
    Mux8Way16(a=o0, b=o1, c=o2, d=o3, e=o4, f=o5, g=o6, h=o7, sel=address[3..5], out=out);

}

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